Update on Intel's Foundry Roadmap: Introduction of the 18A-PT variant, facilitating 3D die stacking, and the enablement of the 14A process node.
In the world of semiconductor manufacturing, Intel's 14A process node stands at a pivotal juncture. The successful development of this node could potentially position Intel as a key player in the race for advanced technology, or it could lead to a withdrawal from the most advanced manufacturing competition.
At the Intel Foundry Direct 2025 event, Intel's new CEO Lip-Bu Tan highlighted the company's progress on its foundry initiative, including the development of the 14A node. However, the success of this node is contingent upon securing significant external demand and meeting technical milestones, such as implementing High-NA EUV lithography and backside power delivery technologies.
Intel's 14A node is expected to feature advanced innovations like backside power delivery, a technology that routes power supply from the back of the chip to improve power efficiency, and High-NA EUV lithography tools, which allow for finer patterning resolution on silicon wafers. These technologies are part of Intel's strategy to catch up with or surpass competitors.
As of mid-2025, the competition primarily consists of TSMC’s N2 node, Intel's 18A node, and Samsung’s SF2. TSMC’s A14 node, an earlier generation compared to Intel’s 14A, has maintained leadership with high-volume manufacturing and broad external customer adoption. Intel's 14A faces the challenge of customer acquisition and technology readiness to compete effectively against TSMC’s mature leading-edge offerings.
Intel aims to start manufacturing on 14A around 2028 or 2029, but it has only about 18 months from mid-2025 to secure a "hero customer" to support the foundry side of the business; failure to do so could lead to discontinuing the 14A node and future leading-edge nodes, effectively exiting the most advanced manufacturing competition.
In addition to the 14A node, Intel is also making strides in other areas. The company is using TSMC's SoIC-X technology for die stacking on its X3D processors, with a 9 micron bump pitch. Intel's 18A node, currently in risk production, will be the first in the industry to be productized with both a PowerVia backside power delivery network and RibbonFET gate-all-around transistors.
Moreover, Intel is collaborating with Electronic Design Automation (EDA) software vendors to enable broad support for industry-standard design tools for the 18A-P node. The company is also developing a new 18A-PT variant that supports Foveros Direct 3D with hybrid bonding interconnects.
Intel is expanding its Intel Foundry Accelerator Alliance program to include the Chiplet Alliance and Value Chain Alliance programs. The new Intel Foundry Chiplet Alliance will enable customers to mix-and-match chiplets into their design based upon interoperable and validated designs. Intel will make its 3D stacking Foveros implementation available to foundry customers, and has noted a new partnership with Amkor.
The event also showcased Intel's broad portfolio of EDA, IP, and services, driven by an ecosystem of industry stalwarts like Synopsys and Cadence. However, Intel's plans for its 10A (1nm-class) process node or its Intel 3 node remain undisclosed.
In the US, Intel currently stands as the only domestic supplier of leading-edge process node technology and advanced packaging capacity. This position is crucial for maintaining technological independence and ensuring a strong domestic semiconductor industry.
In conclusion, Intel's 14A node development is a critical step in the company's journey towards maintaining its position in the cutting-edge semiconductor market. The success of this node will depend heavily on successful customer engagement and overcoming technological challenges. The stakes are high, as the future of Intel's leading-edge process nodes could be at risk if these goals are not met.
Technology plays a pivotal role in Intel's 14A node development, as the company aims to incorporate advanced innovations like backside power delivery and High-NA EUV lithography, which are crucial for power efficiency and finer patterning resolution, respectively. Success in securing a "hero customer" for the foundry side of the business is essential to avoid discontinuing the 14A node and future leading-edge nodes, thereby exiting the most advanced technology competition.
